DIGITAL DESIGN PRINCIPLES AND PRACTICES, Fifth Edition, first printing by John F. Wakerly Errata as of 4/16/21 --------------------------------------------------------------------------------- THINGS THAT ARE WRONG OR MAY BE CONFUSING Page Location Description --------------------------------------------------------------------------------- 86 Ex 2.29(e) Should be "315/24 = 12.2" 129 Drill 3.16 The function in (g) is identical to (b). Also, solutions for (e,f,g) were not updated from 4th ed Drill 4.19. 407 Fig 8-19 Top-left input should be "DIN[15:0]" not "DIN[15:12]". 465 Fig 9-20(a) Adjacency diagram is seriously wrong, omitting (OK0,A1) and (OK1,A0) implied by fourth and fifth rows of state table. As a result, the "decomposed" state assignment in Table 9-5 does NOT work; decoding glitches occur on the transitions corresponding to the missing adjacencies. In fact, there is no 3-variable state assignment for the corrected diagram in which only one state variable changes on each state transition. In this example, and probably in most cases, a one-hot or almost-one-hot assignment as in Table 9-5 is best for glitch-free decoding (using 4 state variables for the state machine of Table 9-4). Sorry about that. 807 Ex 14.41 "HIGH-to-LOW"-->"LOW-to-HIGH"; "four times...the NAND's."--> "two times slower than any of the NAND gate's transitions." 809 Ex 14.61 "series" --> "parallel" 809 Ex 14.62 "parallel" --> "series" 810 Ex 14.71 "minimum"-->"maximum" --------------------------------------------------------------------------------- FAIRLY HARMLESS STUFF Page Location Description --------------------------------------------------------------------------------- 15 1st bullet Delete second "already" 79 Sec 2.16.2, ln 2 "describer"-->"described" 82 Ln 4 "a AMI stream"-->"an AMI stream" 92 Ln -3 The period after "inverter" should be a comma. 211 Prog 5-10, ln 9 Eqn could use "secure" instead of product of three inputs 255 Fig 6-16,17 Swap positions top/bottom; numbering is OK 371 Fig Chapter-opening art is a repeat of Chapter 7 399 Fig 8-15 Rendered proportions are slightly out of whack 420 Prog 8-17 Blue border on left side is too thin 423 Prog 8-18 Blue border on right side is too thin 430 Para -1,-2 Multiplication signs should be in black, not color 502 Para 1 (Sec 10.2.1, last para) "wish-washy"-->"wishy-washy" 503 Sec 10.2.3 Delete "is" in third sentence 548 Fig X10.36 Shift to the right a little bit, out of the margin 568 Fig 11-15 Horizontal connection line from D1 to AND gate is missing 594 Ln -4 "RESET_L"-->"RESET" 619 Prog 12-6 The Aseq and Bseq literals have 32 bits, not 30 619 Prog 12-6 Delete the first two bits of the Aseq and Bseq literals 627 Prog 12-11, ln 2 Delete extra "(RESET==1)" 665 Ex 12.4 Missing period at end 665 Ex 12.8 Delete the suggestion to use state names A, B, C, and so on 672 Ex 12.62 "guess input" --> "Ti input" 672 Ex 12.65 "MSG[0:9][1:128]" --> "MSG[0:9][0:127]" 810 Ex 14.73 Should explicitly state that margins are for 5-V operation 811 Fig X14.73 "VHC" --> "AHC", "VHCT" --> "AHCT" ---------------------------------------------------------------------------------