Digital Design Principles and Practices, Third Edition
John F. Wakerly
Consulting Professor, Electrical Engineering, Stanford University
Vice President, Engineering, Cisco Systems

CONTENTS (subject to change):
(Note: Each chapter ends with References and Exercises)

1. Introduction

2. Number Systems and Codes
Positional Number Systems. Octal and Hexadecimal Numbers. General Positional Number System Conversions. Addition and Subtraction of Nondecimal Numbers. Representation of Negative Numbers. Two's-Complement Addition and Subtraction. Ones'-Complement Addition and Subtraction. Binary Multiplication. Binary Division. Binary Codes for Decimal Numbers. Gray Code. Character Codes. Codes for Actions, Conditions, and States. n-Cubes and Distance. Codes for Detecting and Correcting Errors. Codes for Serial Data Transmission and Storage.

3. Digital Circuits.
Logic Signals and Gates. Logic Families. CMOS Logic. Electrical Behavior of CMOS Circuits. CMOS Steady-State Electrical Behavior. CMOS Dynamic Electrical Behavior. Other CMOS Input and Output Structures. CMOS Logic Families. Bipolar Logic. Transistor-Transistor Logic. TTL Families. CMOS/TTL Interfacing. Low-Voltage CMOS Logic and Interfacing. Emitter-Coupled Logic.

4. Combinational Logic Design Principles
Switching Algebra. Combinational Circuit Analysis. Combinational Circuit Synthesis. Programmed Minimization Methods. Timing Hazards. The ABEL Hardware Design Language. The VHDL Hardware Design Language.

5. Combinational Logic Design Practices
Documentation Standards. Circuit Timing. Combinational PLDs (PLAs; PALs; GALs; Bipolar PLD Circuits; CMOS PLD Circuits; Device Programming and Testing). Decoders. Three-State Buffers. Encoders. Multiplexers. Exclusive OR Gates and Parity Circuits. Comparators. Adders, Subtracters, and ALUs. Combinational Multipliers.

6. Combinational Design Examples
Building-Block Design Examples. Design Examples Using ABEL and PLDs. Design Examples Using VHDL.

7. Sequential Logic Design Principles
Bistable Elements. Latches and Flip-Flops. Clocked Synchronous State-Machine Analysis. Clocked Synchronous State-Machine Design. Designing State Machines Using State Diagrams. State-Machine Synthesis Using Transition Lists. Another State-Machine Design Example. Decomposing State Machines. Feedback Sequential Circuits. Feedback Sequential-Circuit Design. ABEL Sequential-Circuit Design Features. VHDL Sequential-Circuit Design Features.

8. Sequential Logic Design Practices
Sequential Circuit Documentation Standards. Latches and Flip-Flops. Sequential PLDs. Counters. Shift Registers. Iterative versus Sequential Circuits. Synchronous Design Methodology. Impediments to Synchronous Design. Synchronizer Failure and Metastability Estimation.

9. Sequential Logic Design Examples
Design Examples Using ABEL and PLDs. Design Examples Using VHDL.

10. Memory, CPLDs, and FPGAs
Read-Only Memory. Read/Write Memory. Static RAM. Dynamic RAM. Complex PLDs. FPGAs.

11. Additional Real-World Topics
Computer-Aided Design Tools. HDL-Based Design Flow. Design for Testability. Estimating Digital System Reliability. Transmission Lines, Reflections, and Termination

Back to home